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User:Ashis Kumar Mal

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Ashis Kumar Mal received Bachelors' degree in Electronics & (Tele)Communications Engineering from Bengal Engineering College ( now IIEST ) Shibpur and Masters' from IIT Kanpur in 1989 and 1992 respectively. He had been qualified with Ph.D. (IIT ) in 2006 for his research carried on Microelectronics & VLSI. He/his group has contributed more than 60 articles in refereed International Journals and Conferences. His work on EDA tool based CMOS design (PDM,2014), other than pen-paper design, conventionally followed, is simpler, quicker and more accurate which yields guaranteed transistor saturation, an essential requirement for most CMOS circuits, quite difficult especially when transistors are vertically stacked (Cascode). He is working on low power counter using GRAY code (2016) using a novel approach of generating Gray codes (for any even integer) using graphs/maps. As IEEE Solid-State Circuits Society (SSCS) member, he is actively been associated with many National and International Conferences. His interest includes Analog / Mixed Signal VLSI (AMS), Digital Assisted Analog (DAA), FPGA, Interconnect Modelling, Cryptography, Optical Networks and Massive Online Open Courses (MOOC). As faculty of Circuits & Systems, he enjoys teaching and loves to simplify concepts. He is currently with NIT Durgapur ( as Associate Professor in the Department of Electronics & Communication Engineering and a member of the Chips to System Design (VLSI) group.